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AT89C5131芯片功能详情

时间:2010-12-30 09:27:08

芯片解密过程中,对芯片内部结构及其加解密特征进行技术分析是解密工程师的一项必修课,因为只有充分理解芯片内部结构原理等技术信息,工程师才能准确进行方案开发,确定最可靠、成功率最高的解密方案,最大限度确保解密项目的安全可靠
以下是我们对AT89C5131的简单介绍供各位参考:
Features
· 80C52X2 Core (6 Clocks per Instruction)
– Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode
– Dual Data Pointer
– Full-duplex Enhanced UART (EUART)
– Three 16-bit Timer/Counters: T0, T1 and T2
– 256 Bytes of Scratchpad RAM
· 32-Kbyte On-chip Flash In-System Programming through USB or UART
· 4-Kbyte EEPROM for Boot (3-Kbyte) and Data (1-Kbyte)
· On-chip Expanded RAM (ERAM): 1024 Bytes
· USB 1.1 and 2.0 Full Speed Compliant Module with Interrupt on Transfer Completion
– Endpoint 0 for Control Transfers: 32-byte FIFO
– 6 Programmable Endpoints with In or Out Directions and with Bulk, Interrupt or Isochronous Transfers
· Endpoint 1, 2, 3: 32-byte FIFO
· Endpoint 4, 5: 2 x 64-byte FIFO with Double Buffering (Ping-pong Mode)
· Endpoint 6: 2 x 512-byte FIFO with Double Buffering (Ping-pong Mode)
– Suspend/Resume Interrupts
– Power-on Reset and USB Bus Reset
– 48 MHz DPLL for Full-speed Bus Operation
– USB Bus Disconnection on Microcontroller Request
· 5 Channels Programmable Counter Array (PCA) with 16-bit Counter, High-speed Output, Compare/Capture, PWM and Watchdog Timer Capabilities
· Programmable Hardware Watchdog Timer (One-time Enabled with Reset-out): 50 ms to 6s at 4 MHz
· Keyboard Interrupt Interface on Port P1 (8 Bits)
· TWI (Two Wire Interface) 400Kbit/s
· SPI Interface (Master/Slave Mode)
· 34 I/O Pins
· 4 Direct-drive LED Outputs with Programmable Current Sources: 2-6-10 mA Typical
· 4-level Priority Interrupt System (11 sources)
· Idle and Power-down Modes
· 0 to 32 MHz On-chip Oscillator with Analog PLL for 48 MHz Synthesis
· Low Power Voltage Range
– 3.0V to 3.6V
– 30 mA Max Operating Current (at 40 MHz)
– 100 ·A Max Power-down Current
· Industrial Temperature Range
· Packages: PLCC52, VQFP64, MLF48, SO28
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