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PIC18F46J50芯片解密

时间:2010-09-14 09:02:15

芯片解密过程中,对芯片内部结构及其加解密特征进行技术分析是解密工程师的一项必修课,因为只有充分理解芯片内部结构原理等技术信息,工程师才能准确进行方案开发,确定最可靠、成功率最高的解密方案,最大限度确保解密项目的安全可靠
以下是我们对PIC18F46J50芯片的简单介绍供各位参考:

This low power and high performance 8-bit MCU with integrated full-speed USB 2.0 and peripheral flexibility comes in a small package for cost sensitive applications in the PIC18 J-series. New features include Deep sleep mode for low power applications, Peripheral Pin Select for design flexibility for mapping peripherals to I/O pins and a CTMU module for easy capacitive touch user interfaces. The PIC18F46J50 family is ideal for applications requiring cost-effective, low-power USB solutions with a robust peripheral set in a small package.

  Features
Featuring nanoWatt XLP™ Technology ideal for battery applications Typical nanoWatt XLP™ specifications include:
•  15nA Deep Sleep mode (Watch Webinar)
•  60nA Sleep mode (RAM retention)
•  830nA Real Time Clock & Calendar operation in Sleep modes
•  780nA Watch Dog Timer operation in Sleep modes
Other Features:
•  Integrated full speed USB 2.0
•  Deep Sleep mode ideal for battery applications
•  Peripheral Pin Select for mapping digital peripherals to various I/O for design flexibility
•  Hardware RTCC provides clock, calendar & alarm functions
•  Charge Time Measurement Unit (CTMU) supports capacitive touch screens
•  2 Enhanced Capture / Compare / PWM modules
•  2 MSSP serial ports for SPI or I2C™ communication
•  2 Enhanced USART modules
•  8-bit Parallel port
•  Dual analog comparators
•  13 ch, 10-bit ADC
•  Self programming Flash supports 10k erase/write cycles & 20 years retention
•  Operating voltage 2.0 - 3.6V, 5.5V tolerant digital inputs


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