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ZPSD211RN 解密及性能介绍

时间:2011-08-04 09:54:53

   ZPSD211RN 解密以及其他多款单片机解密是深圳世纪芯目前已经拥有成熟现成解密方案的典型FREESCALE单片机解密项目。
ZPSD211RN Features:
Low cost programmable microcontroller peripheral
256Kb of UV EPROM with the following features:
Configurable as 32 K x 8
Divided into eight equally-sized mappable blocks for optimized address mapping
As fast as 70 ns access time, which includes address decoding
19 I/O pins that can be individually configured for :
Microcontroller I/O port expansion
Programmable Address decoder (PAD) I/O
Latched address output
Two Programmable Arrays (PAD A and PAD B) replace your discrete PLD or decoder and have the following features:
Up to 13 Inputs and 24 outputs
36 Product terms (9 for PAD A and 27 for PAD B)
Ability to decode up to 1 MB of address
Microcontroller logic that eliminates the need for external “glue logic” has the following features:
Ability to interface to multiplexed buses
Built-in address latches for multiplexed address/data bus
ALE and Reset polarity are programmable (Reset polarity not programmable on V-versions)
Multiple configurations are possible for interface to many different microcontrollers
Programmable power management with standby current as low as 1?A (V versions only)
CMiser bit-programmable option to reduce AC power consumption in memory
Turbo Bit (ZPSD only)-programmable bit to reduce AC and DC power consumption in the PADs
Built-in security locks the device and PAD decoding configuration
Wide Operating Voltage Range
V-versions: 2.7 to 5.5 volts
Others: 4.5 to 5.5 volts
Available in a variety of packaging (44-pin PLDCC, CLDCC, and PQFP)
Simple, menu-driven software (PSDsoft) allows configuration and design entry on a PC.

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